LCD driver EDK IP core

for Xilinx EDK

Martin Týma, FEL »VUT

Features

Introduction

This application note describes a Sitronix ST7066U LCD controller driver for EDK which provides a command based, high-level interface for communication with a LCD.

Description

Synopsis

#include <lcd_driver.h>

void lcd_init(LCDInst *instance, Xuint32 baseaddr)
void lcd_write_cmd(LCDInst *instance, Xuint8 cmd)
void lcd_write_data(LCDInst *instance, Xuint8 data)

Description

The lcd_init() function initializes an instance of the driver for the device given by it's base address. It must be called befor any operation on the device.

The lcd_write_cmd() function writes an instruction to the LCD controller. For a list of available instructions see the LCD controller datasheet [1] or the documentation of your development board. The instruction code consist only of the data bits value, the RW and RS bits are set automaticaly by the driver/IP core. The header file of the driver contains #defines for the most of the available instructions.

The lcd_write_data() function writes data to the controllers CG RAM or DD RAM (depends on a previous instruction).

Note: There is no support for the "Read Busy Flag and Address" and "Read Data from CG RAM or DD RAM" instructions, as the driver/IP core is conceived for write-only operation mode.

Design Files

The accompanying ZIP file (lcd_driver.zip) contains the following files:

Structure

Description

lcd_driver_v2_1_0.mpd
Microprocessor Peripheral Definition file (MPD). Describes bus and external port connections of the peripheral device.
lcd_driver_v2_1_0.pao
Peripheral Analyse Order file (PAO). Dictates the correct order of synthesis for the VHDL source files.
lcd_driver.vhd
Peripheral top level design. Instantiates the IPIF and user logic.
user_logic.vhd
Connects the LCD driver main module to the OPB throught the IPIF.
lcd.vhd
LCD driver main module.
lcd_fsm.vhd
LCD driver main FSM.
lcd_cmd.vhd
Command transfer module. Handles the transfer of an instruction/data byte using two sequential 4-bit operations.
lcd_init.vhd
Power-On initialization module. Establishes the required communication protocol.
lcd_driver_v2_1_0.mdd
Microprocessor Driver Definition file (MDD). Lists the peripherals that are able to use the software driver.
lcd_driver_v2_1_0.tcl
TCL script used by EDK for #define statements generation (e.g. baseaddress) in the xparameters.h header file.
Makefile
Makefile used for building the SW driver.
lcd_driver.c
Software driver source file.
lcd_driver.h
Software driver header file.
lcd_driver_l.h
Software driver low-level definitions & macros.
lcd_driver_selftest.c
Peripheral self-test. Contains code to test the correct operation of the peripheral.

Design Implementation

This section describes how to create a simple EDK project to see a working demo of the peripheral driver.

  1. Start EDK and create a new project with the Base System Builder (BSB). You can find detailed instructions how to do this in the EDK tutorial [2]. In the peripheral selection part of the wizard leave all devices exept RS232 (will be used as STDIN and STDOUT) unchecked. Also disable the creation of all sample applications (Memory test, Peripheral SelfTest).
  2. Copy both top directories (pcores, drivers) of the accompanying archive to the root directory of your new EDK project.
  3. In the main EDK menu select: "Project"->"Rescan User Repositories".
  4. In the "Project Information Area" select "IP Catalog". Under "Project Local pcores" you should see "LCD_DRIVER". Double click on it to add the IP to the design. A lcd_driver_0 item should now appear in the System Assembly View window.
  5. Connect the IP to the OPB bus by selecting mp_opb as the bus connection for the SOPB connector of lcd_driver_0 in the System Assembly View window.
  6. Switch the "Filters" radio button to "Ports" and connect the IP ports. Set lcd_driver_0_LCD_E net for LCD_E, lcd_driver_0_LCD_RS for LCD_RS, lcd_driver_0_LCD_RW for LCD_RW and lcd_driver_0_LCD_DATA for LCD_DATA.
  7. Switch the "Filters" radio button to "Addresses" and click on the "Generate Addresses" button.
  8. If other Processor-Bus clock frequency then 50 MHz is used, a matching C_OPB_Clk_FREQ_HZ generic value must be chosen in the IP core configuration (System Assembly View window->lcd_driver_0->Configure IP).
  9. Edit the UCF file. You can open it from the "Project Information Area" window under the "Project" bookmark. Add constraints for all LCD_DRIVER pins. Name the pins LCD_E, LCD_RW, LCD_RS and LCD_DATA. The constraints are board-specific and you can find them in the documentation for your board. For example for the Spartan-3E Starter board you need to add the following to the UCF file:
    NET LCD_E LOC = M18 | IOSTANDARD = LVCMOS33;
    NET LCD_RS LOC = L18 | IOSTANDARD = LVCMOS33;
    NET LCD_RW LOC = L17 | IOSTANDARD = LVCMOS33;
    NET LCD_DATA<0> LOC=R15 | IOSTANDARD = LVCMOS33;
    NET LCD_DATA<1> LOC=R16 | IOSTANDARD = LVCMOS33;
    NET LCD_DATA<2> LOC=P17 | IOSTANDARD = LVCMOS33;
    NET LCD_DATA<3> LOC=M15 | IOSTANDARD = LVCMOS33;
    
  10. Edit the MHS file. Add the following four lines at the end of the file:
    PORT LCD_E = lcd_driver_0_LCD_E, DIR=O
    PORT LCD_RW = lcd_driver_0_LCD_RW, DIR=O
    PORT LCD_RS = lcd_driver_0_LCD_RS, DIR=O
    PORT LCD_DATA = lcd_driver_0_LCD_DATA, DIR=O, VEC=[3:0]   
    
  11. In the main menu click on "Hardware"->"Generate Bitstream". The HW part of the project should now successfully synthetize.
  12. In the "Project Information Area" select "Applications" and click on "Add Software Application Project" to create a new SW project.
  13. Add a new source to the created SW project with the following content:
    #include "xparameters.h"
    #include "lcd_driver.h"
    
    void main() {
        LCDInst lcd;
    
        lcd_init(&lcd, XPAR_LCD_DRIVER_0_BASEADDR);
        lcd_selftest(&lcd);
    }
    
  14. Select the SW project to initialize the BRAM in the "Project Information Area". Disable any other application (microblaze_0_bootloop, microblaze_0_xmdstub) to initialize the BRAM.
  15. In the EDK main menu select "Software"->"Build All User Applications". The SW project should successfully compile.
  16. Select "Device Configuration"->"Download Bitstream" to program the device.

As soon as the FPGA finishes its configuration, "LCD test" should appear on the LCD. Informations about the process of the selftest are also writen to STDOUT (RS232).

References

[1] http://www.sitronix.com.tw/sitronix/product.nsf/Doc/ST7066U?OpenDocument
[2] http://www.xilinx.com/support/techsup/tutorials/edk_tutorials.htm

Atachments

1. lcd_driver.zip - A ZIP archive containing the sources